WHO WINS WHEN THE CHIPS ARE DOWN?

Latest research on advanced chip packaging innovation in the critical shift toward efficient semiconductor design unlocks energy, cost, and performance gains for AI and data centers

“The digital infrastructure that powers AI, cloud computing, and consumer electronics is on an unsustainable path in terms of energy and emissions. Innovators in chip packaging are slashing energy use, shrinking form factors, and unlocking higher performance per watt—reshaping what’s possible across industries.”

 -- Buff López, Associate, Materials & Chemicals, Cleantech Group

Digitalization is rapidly expanding, driven by growth in AI and data centers. The IEA’s recently published report, Energy and AI, sounds the alarm on dramatic increases in energy demand. Forecasts for electricity consumption by data centers are highly uncertain, with some estimates far exceeding current unprecedented demands. With the U.S. poised to lead globally in data center electricity consumption due to AI by 2030 – a projected estimate of nearly 1,000 TWh of electricity globally by 2030, the shift toward efficient semiconductor design is no longer optional—it’s critical.

To learn more about the next wave of advanced chip packaging and the backdrop of evolving regulatory standards and geopolitical tensions that appear to be forecasting a production recession WATERTODAY reached out to Buff López.

By Suzanne Forcese

WT: Buff can you speak to some of the packaging breakthroughs that enable sustainability while enabling performance.

López: At the core of chip innovation are approaches that enable new entrants to compete at significantly lower costs while enhancing performance, reducing size, improving energy efficiency, reducing manufacturing steps, and increasing time-to-market. New semiconductor materials have a downstream impact on chip performance:

Pragmatic’s metal-oxide thin-film transistors (TFT) enable 75X less area consumption and 75X lower power consumption. It eliminates additional rigid packaging at less than $1 per chip and delivery within weeks.

Forge Nano developed coatings using atomic layer deposition (ALD) slashing chip energy use by 50% while boosting processing speeds by 40%.

Nano-C’s fullerenes enable 50% lower power consumption for chipmakers.

Similarly, alternative packaging materials have an impact. Limitations lay at the front-end of the process of chip manufacturing where the industry faces rapid growth in demand for differentiation in fine pattern, large area, and low-power substrates.

Absolics’ glass substrates offer 30% better power efficiency and a 40% performance increase:

Black Semiconductor uses graphene and light (photonics) to connect chips, promising 100X-1000X faster processing with 60% fewer manufacturing steps.

Celestial AI’s photonic fabric eliminates use of copper-based data movement by instead using light for information processing.

Advanced packaging techniques are also crucial. The integration of various chip components into a single chip can reduce size while improving performance.

SEMRON’s compute-in-memory chips combine processing and memory functions into a single unit, using electrical fields rather than currents for 50X greater energy efficiency and 100X cost reduction for compute:

QuInAs Technology’s chips use compound III-Vs, demonstrating 2-3 orders of magnitude greater energy efficiency.
Lightmatter developed silicon photonic elements enable packaging without redesign in 50% less area.
Insentivate developed silicon chips that reduce electricity consumption by 95% in data centers, reduce rack space by 97%, and enable up to 12X computational performance improvement.

WT: Are you seeing these start-ups making a difference in data centers?

López: The shift towards more efficient chip technologies is already happening, particularly in data centers. Switching from silicon to gallium nitride (GaN) and silicon carbide (SiC) technologies offer >97%-99% and 98.6% energy efficiency, respectively, compared to 90% for silicon. For every ten racks in a data center, switching to GaN can increase profitability by $3M annually and reduce CO₂ emissions by 100 metric tons per year (Infineon). But switching to these technologies may be challenging and expensive for chip manufacturers. Cambridge University spin-out, Cambridge GaN Devices, enables compatibility of GaN with existing silicon production lines without retrofitting to special equipment. Its devices offer energy savings of up to 50% while enabling smaller devices.

WT: Can you speak to the market challenges and a possible looming recession.

López: The market faces significant challenges, including geopolitical tensions that threaten its complex supply chain. Geopolitical tensions like China’s dominance over key metals and rare earths (like gallium) and U.S.-imposed tariffs on exports, are creating uncertainty, increasing costs, and potentially triggering a production recession. Chipmakers are already facing substantial losses due to tariffs, with AMD reporting a $1.5B loss in AI chip revenue previously sold to China. In Europe, the Green Deal, while promoting sustainability, could inadvertently hinder chip innovation by increasing production costs and limiting flexibility.

WT: Do you see market growth despite the uncertainty?

López: The market is seeing rapid growth driven by the demand for AI. The global revenue in 2024 was $627B for semiconductors. Generative AI chips already represent 25% of the total advanced packaging market and are projected to grow at 20% annually over the next decade (BCG). TSMC (Taiwan Semiconductor Manufacturing Company) reported a 58% profit increase in Q4 2024 fueled by rising AI demand, estimated to reach $243B in 2025 and $1T-$2T by 2030. Beyond AI, other sectors like automotive and Internet-of-Things (IoT) are also expected to drive revenue growth for companies like Qualcomm.

Semiconductor cleantech raised over $2.6B from 2020-2024 in private funding. The largest investment year was 2023 at $1.14B in Equity funding raised. Companies like Singapore-based Silicon Box ($100M Growth Equity, total near $300M) and Korea Republic-based DEEPX ($80.5M Growth Equity) raised most of the funding. Pragmatic raised $231M, and Chinese-based Tian Yu Semiconductors raised $176.7M. U.S.-based iDEAL Semiconductor received $40M from Applied Materials. There was a slight dip in funding from ’23 to ’24, however, the industry has seen an overall growth in a year-over-year comparison.

WT: What’s next?

López: With semiconductors poised to become the backbone of global digital infrastructure, the market opportunity is immense—but so is the urgency to innovate. Generative AI alone accounts for 25% of the advanced chip packaging market today and is projected to grow 20% annually through 2035.

We’re already seeing some leading startups like DEEPX and Silicon Box making significant strides forward. Consolidation of the supply chain has already begun, as advanced packaging solutions cut out complex steps requiring (often outsourced) highly specialized labor and expensive equipment. Innovators have earmarked initial production by 2027 with some gearing up for commercial scale as soon as 2030—market disruption is near.

Those who fail to embrace innovation risk displacement by faster, cheaper, and more efficient chips that will trickle down to even non-AI applications. Emerging chips are a critical breakthrough in setting a strong foundation in driving the next wave of innovation in AI hardware and components. But these chips are not a silver bullet and will have limited impacts for the industry.